Thin Film Fabrication Technology

Substrate Material

Purity

A Surface

Roughness

B Surface

Roughness

Dielectric

Constant

Thermal

Conductivity

Dissipation Factor

(Loss Tangent)

%

µ"

µ"

@1MHz

W/mK

@1MHz

Asfired Alumina (A1₂O₃)

99.6

3

3

9.9±1

26.9

0.0001

Polished Alumina (Al₂O₃)

99.6

1

1 or 12

9.9±1

26.9

0.0001

Aluminum Nitride (AlN)

98

3

3

8.6

170

0.001

Beryllium Oxide (BeO)

99.5

3

10

6.5

270

0.0004

Sapphire (A/C plane—Al₂O₃)

100

1

1

10.0

-

0.00086

Quartz (SiO₂)

100

1

1

4.4

-

0.000015

Metallization

System

Application

component

Attachment Method

Typical

thickness range

Max. use

temperature

TiW(Ti)/Pt/Au

Standard thin film metal system for conductors

Au/Sn，

Au/Si，

Au/Ge，

Au/Sn，

Au/Si，

Au/Ge Eutectic；

Epoxy

TaN：25–100Ω /sq

TiW(Ti)：500–800Å

Au：0.5–5µm，

typical = 3µm

425℃

TaN/TiW(Ti)/Au

Standard thin film metal system for conductors with resistor layer

380℃

TiW(Ti)/Ni/Au

Conductor applications that require Pb/Sn soldering

Au/Sn，

Au/Si，

Au/Ge，

Pb/Sn，

Au/Sn，

Au/Si，

Au/Ge Eutectic；Pb/Sn；

Epoxy

TaN：25–100Ω /sq

TiW(Ti)：500–800Å

Ni：1000–10000Å

Au：0.5–5µm，

typical = 3µm

350℃

TaN/TiW(Ti)/Ni/Au

Conductor with resistor layer applications that require Pb/Sn soldering

350℃

TaN/TiW (Ti)/Au/

Cu/Ni/Au

High current ＆low loss applications

Au/Sn，

Au/Si，

Au/Ge，

Pb/Sn Au/Sn，Au/Si，

Au/Ge Eutectic；Pb/Sn

TaN：25–100Ω /sq

TiW(Ti)：500–800Å

Au：0.2–1µm

Cu：0.5–12µm

Ni：0.5–2µm

Au：0.5-5µm

350℃

项目

Specifications

Typical

英制

公制

Features

Overall circuit size tolerance：

±1mil

±25µm

Diced features：

±1mil

±25µm

Minimum distance from the diced edge:

1mil

25µm

Laser machined features：

±2mil

±50µm

Minimum distance from the laser machined edge:

2mil

50µm

Conductor

Minimum line width:

0.8mil

20µm

Minimum gap:

0.4mil

10µm

Dimensional tolerance on critical areas:

±0.1mil

±2.5µm

Dimensional tolerance on noncritical areas:

±0.2mil

±5µm

Metal thickness tolerance:

±20%

Resistor

Minimum length and width of resistors

2×2mil

50×50µm

Resistor tolerance:

±10%/±5%/±1%

Watts density:

≥3.8mW/mil²

≥6W/mm²

Vias

*Via hole diameter aspect ratio:

≥0.6

Via hole diameter tolerance:

±2mil

±50µm

Minimum annular ring around metalized cutout:

4mil

100µm

Minimum via hole spacing：

One diameter

Filled material：

电镀通孔Hollow plated vias

Au或Cu实心孔Au/Cu solid filled vias

Slot

Metallization pullback:

±2mil

±50µm

Metalized edge wrap minimum recess:

4mil

100µm

Minimum radius:

2mil

50µm